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Chapter 18: GIO Device Drivers

The GIO bus is a synchronous, multiplexed address-data bus connecting high-speed devices to main memory and CPU for Silicon Graphics workstations. This chapter gives an overview of the GIO architecture, and describes the special kernel functions used to manage a device on the GIO bus. The main topics are as follows:

"GIO Bus Overview" describes the hardware implementation of the GIO bus.
"Configuring a GIO Device" discusses the use of the VECTOR line to describe a GIO device to IRIX.
"Writing a GIO Driver" discusses the work done in each entry point of a GIO device driver.
"Memory Parity Workarounds" covers an important hardware problem.
"Example GIO Driver" displays major parts of a driver for a hypothetical GIO device.

GIO Bus Overview
Configuring a GIO Device
Writing a GIO Driver
Memory Parity Workarounds
Example GIO Driver

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